The 4-Decade Arc: Two Technology S-Curves

Where Each Incremental Dollar Lands: Leading-Edge Node Scaling vs. Compute-in-Memory

01. Two Technology S-Curves: Investment vs. TOPs/W Return

Where each incremental dollar lands across cumulative investment effort.

Two Technology S-Curves: Where Each Incremental Dollar LandsCumulative investment (effort-dollars into the technology)Energy efficiency per unit of AI work (TOPs / W)Leading-edge node scaling — 2026 (GPU Plateau)~30% per generation at $20–119B (Terafab)dy/dx → small and fallingBSA-CIM todaypre-silicon; gate programdy/dx large — steep section aheadADC right-sizingCSD co-training3D BEOL stackingcompiler maturity★ Overtakes GPU in TOPs/W (+ node ports)dashed = modeled/projected S-Curve ascensionAxis scope: energy efficiency (TOPs/W) — the axis flattened by Dennard scaling. Solid = measured/modeled; dashed = projected lever stack.

02. Architectural Lineage

Four decades of computing paradigms converging into non-volatile bit-serial execution.

1980s · Vector Supercomputer Era (Cray-1 / Cray X-MP) 500 kW • ECL Logic

Pioneered long vector registers and pipelined arithmetic. Highly performant for linear algebra, but constrained by immense power and liquid cooling systems.

2000s · Massively Parallel GPU Era (NVIDIA G80 / CUDA) 300W • von Neumann HBM

Transformed GPUs into general-purpose parallel accelerators. Delivered massive throughput for deep learning, but hit the von Neumann memory wall (~20 pJ/bit data commute tax).

2026+ · The Sibacus BSA-CIM Era 0.239 pJ/MAC • BEOL 22nm eRRAM

Eliminates von Neumann data movement by computing directly inside Metal 4/5 BEOL RRAM layers using zero-multiplier Bit-Serial Addition. Delivers supercomputer-class matrix throughput at sub-watt edge energy levels.